行业:IT|通信|电子|互联网
职位:电子技术/半导体/集成电路
部门:
人数:若干
地区:上海
性质:全职
性别:不限
婚姻:不限
学历:本科
经验:不限
年龄:不限年龄
待遇:面议
内部培训 五险一金 工作环境好 弹性工作制 年终多薪

仅限于2018年毕业的学生​
MAJOR DUTIES AND RESPONSIBILITIES:
1.Participate in the architecture, design and verification of highly integrated networking SoC products.
2.Job function include block level  micro-architecture design, RTL implementation and verification,
3.logic synthesis, timing analysis, test pattern generation and silicon validation.
4.MINIMUM REQUIREMENTS / EDUCATION:
5.M.S.E.E with knowledge of logic design using Hardware Description Language and related design tools.
6.Knowledge of communication protocols such as Ethernet is preferred.